Disclaimer:
This tool and its accompanying documentation are provided for preliminary analysis and educational purposes only.
Results have not been independently verified or validated for use in mission-critical decisions. Users are solely responsible for
verifying all outputs against their own analysis and applicable standards before making any design, test, or mission decisions.
Space RHA LLC makes no warranties, express or implied, regarding the accuracy, completeness, or fitness for any particular purpose
of the results produced by this tool, and shall not be held liable for any damages arising from its use.
1. What this tool does
It turns a memory's upset behaviour and its error correction into the number a system actually cares about: how often a read
returns something the code could not fix, split into failures the system is told about, failures it is not, and time the device
spends recovering from a functional interrupt. It does this for SRAM, DDR modules, FPGA configuration memory and flash, and it
shows which of the design levers, scrub period, interleave, code, striping, moves the answer for your configuration.
The model: Saleh, Serrano and Patel's scrubbed memory model for accumulated
upsets, extended with multiple cell upsets through the physical interleave, bursts confined to one die of a striped word, hard
errors that consume correction capacity, and functional interrupts as outages. The engine reproduces Saleh's closed form to five
figures and agrees with a Monte Carlo of an interleaved scrubbed memory within counting statistics. Full description on the
tool page.
2. Inputs
- Preset. Start from the nearest one; it sets the word structure, striping, interleave, code, scrub and the
technology defaults. Everything it sets is editable.
- Devices a word is striped across. One for embedded memory or a single die. Nine for a 72 bit word on x8
devices, eighteen on x4. The tool derives the bits of a word per device from this, and that number decides what a functional
interrupt or row error looks like to the code.
- Interleave. The number of cells between two bits of the same word along the word line. One means adjacent.
Vendors rarely publish it; the corpus shows which reports observed clusters landing in one word and which did not. DRAM
arrays place adjacent cells in different words by layout, so use a large value there.
- Code. Parity, SEC-DED, DEC-TED, chipkill, custom Reed Solomon, or word level TMR. Symbol codes ask for the
symbol size; set it equal to the device width for chipkill. The miscorrection fraction is the share of error patterns beyond
the detection range that come back as valid looking wrong data; the defaults come from the literature and are shown with
each code.
- Scrubbing. A periodic sweep rewrites every word each period. Random access scrubbing corrects words as
they happen to be read and is about twice as bad at the same mean interval. Correct on read with write back makes the access
interval the effective period; without write back, correction on the fly leaves the error in the array and is not scrubbing.
- Upset rate. Per bit per day, from your test data and environment, or computed here from a Weibull and one
of the site's environments with the cosine law. For non planar parts use the alpha law tool.
- Multiple cell parameters. Fraction of events that are multi cell, mean cells per such event, and the mean
extent along the word line. The node sets defaults from Ibe's scaling series; the corpus median is shown beside them.
- Functional interrupts, row and column errors, hard errors. Per device per day or per bit per day. The
corpus panel gives the cross section range by technology so you can sanity check what you enter.
3. Reading the output
- DUE versus SDC. Detected uncorrectable errors are reported to the system; silent data corruption is not.
They have different consequences and different fixes.
- Words versus events. One cluster can corrupt more than one word when it spans more than twice the
interleave. The headline counts words, because a read returns a word; the mechanism table shows the multiplier.
- Device burst. The caption under the headline says what a single device failure looks like to your code
and whether the code corrects it, detects it, or cannot reliably do either. That one sentence explains most of the difference
between SEC-DED and chipkill.
- The scrub plot. Where the total goes flat as the period shortens, scrubbing faster buys nothing.
- The interleave plot. Where the total goes flat as the interleave grows, clusters no longer reach across a
word.
- Sensitivity. The accumulation term scales as the upset rate to the power t plus one. A factor of two on
the input is a factor of four for SEC-DED and eight for DEC-TED.
4. Caveats
- Events are assumed independent and Poisson, which is a good description of cosmic ray upsets on orbit and a poor one of
terrestrial DRAM field failures, which are dominated by correlated hard faults.
- The cluster extent along the word line is the least published quantity in the model. The tool exposes it; do not treat the
default as a measurement.
- Miscorrection fractions for DEC-TED are placeholders; the SEC-DED and Reed Solomon values are from the literature.
- Statistical intervals are not provided because the inputs, not the arithmetic, carry the uncertainty; use the sensitivity
panel to see how far the answer moves.
5. References
Saleh, Serrano and Patel, IEEE Transactions on Reliability 39(1), 1990. · Ladbury, SDRAM Testing: Lessons
Learned, NEPP 2010. · Ibe and others, IEEE Transactions on Electron Devices 57(6), 2010. · Pieper and others, IEEE
Transactions on Nuclear Science, 2022. · Quinn and others, IEEE Transactions on Nuclear Science 52(6), 2005. · Ostler
and others, IEEE Transactions on Nuclear Science 56(6), 2009. · Hussein and Swift, Xilinx WP395, 2015. · Yeleswarapu
and Somani, arXiv 1908.01806, 2019. · Dell Technologies, PowerEdge Memory RAS, 2020.
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